LEAKAGE REDUCTION AND STABILITY IMPROVEMENT TECHNIQUES OF 10T SRAM CELLS: A SURVEY
Publication Date : 19/02/2016
Reduction of leakage power is very important for low power applications.Because these high leakage currents are the major contributor of total power consumption of the circuit.This paper explains about various leakage reduction techniques as well as stability improvement techniques of the different SRAM cells. Some of the leakage reduction techniques discussed in this paper are dynamic VDD, multiple Vth, SVL (Self- Controllable Voltage Level) and AVL( Adaptive Voltage Level). The stability improvement techniques are word-line adjustment, dual voltage supply, NBL (Negative Bit line) and bit interleaving technique. These techniques are applied on different SRAM cells (6T, 7T, 8T and 10T) and the results are compared. For simulation, MICROWIND 3.1 tool is used.
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