An Efficient CircularConvolution using Higher Radix-256 Booth Encoding Algorithm
Publication Date : 30/01/2018
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Convolution algorithm play a key role in digital processing applications. They involve many multiplication steps and consume a lot of processing time. As such, they play a vital role in determining the performance of the digital signal processor. Convolution implemented with Vedic mathematics proved fast as compared to those using conventional methods of multiplication and division. This paper presents a novel VerilogHDL implementation of convolution algorithm with multiplier using radix-256 booth encoding to reduce the partial product rows by eight fold and carry propagate free redundant binary addition for adding the partial products, thus, contributing to higher speed. The entire design was implemented in Xilinx ISE 13.1 targeted towards Virex-7. Keywords - Radix-256,Redundant Binary (RB) addition, Xilinx ISE.
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