AN OPTIMAL SOLUTION FOR FLOOR-PLANNING AND MINIMIZATION OF CONNECTIVITY
Publication Date : 30/01/2018
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The Minimization of the Connectivity plays the important Role in the Physical Design automation of very large scale integration (VLSI) chips. The Connectivity Minimization can be achieved by finding the optimal solution for VLSI physical design components like Partitioning and floor-planning. In VLSI Problem of obtaining minimum delay in partitioning has prime importance. Reducing the minimum delay in partitioning and the area in the floor plan helps to minimize the connectivity. And performing this we are using different algorithms like Interative-improvement techniques and Rectangular dual graph based are used in Partitioning and floor-plan.
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