Design and Analysis of Carry Look Ahead Adder using 180nm Technology
Publication Date : 30/01/2018
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Addition forms the basic structure for digital signal processing operations like counting, multiplication, filtering etc. Adder circuits perform addition of two binary numbers which is a great interest for many designers in arithmetic logic unit. Compare with Ripple carry adder, Carry-look ahead adder has advantage in processing speed, so carry-look ahead adder is a major functional block in arithmetic logic unit due to its high speed operation. Therefore, it is of interest to study the functional behaviour and power consumption of carry-look ahead adder. In this project, the proposed adder has been designed by using 180 nm STATIC CMOS technology and founded that static CMOS logic offers low delay compare with adiabatic logic which offers low power.
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