International Journal of Recent Trends in Engineering & Research

online ISSN

Single Chip ASIC Design For Wireless Sensor Networks

Publication Date : 30/01/2018


DOI : 10.23883/IJRTER.CONF.20171225.092.AMJNL


Author(s) :

GANTHOTI NARESH , BADAVATH KRISHNA.


Conference Name :
RECENT ADVANCES IN ELECTRONICS AND COMMUNICATION ENGINEERING-2017



Abstract :

This paper describes the hardware requirements and design constraints that derive from unique features of body sensor networks (BSNs). Based on the BSN requirements, we examine the tradeoff between custom hardware and commercial off the shelf (COTS) designs for BSNs. The broad range of BSN applications includes situations where either custom chips or COTS design is optimal. For both types of nodes, we survey key techniques to improve energy efficiency in BSNs and identify general approaches to energy efficiency in this space.


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